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The text discusses the designing of field-programmable gate array based green computing circuits for efficient green communication. It will help senior undergraduate, graduate students, and academic researchers from diverse engineering domains such as electrical, electronics and communication, and computer.
The text discusses the designing of field-programmable gate array based green computing circuits for efficient green communication. It will help senior undergraduate, graduate students, and academic researchers from diverse engineering domains such as electrical, electronics and communication, and computer.
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Autorenporträt
Keshav Kumar is currently working as an Assistant Professor at Chandigarh University, Punjab, India. He has also worked as a JRF with NIT Patna, and as an Assistant Lecturer at Chitkara University, Punjab, India. He has completed his Master of Engineering in ECE with the specialization in Hardware Security from Chitkara University, Punjab, India. He has written over 30+ research paper in the field of Hardware security, Green Communication, Low power VLSI Design, Machine learning techniques, and IoT. He also has worked with professor of 15 different countries. His area of specialization is such as Hardware security, Green Communication, Low power VLSI Design, Machine learning techniques, WSN, and IoT. He is also associated with Gyancity Research Consultancy Pvt Ltd. He is also a member of IAENG. His Google Scholar profile: ¿Keshav Kumar¿ - ¿Google Scholar¿¿¿¿¿¿¿¿¿; His Scopus Profile: Scopus preview - Kumar, Keshav - Author details - Scopus
Prof Dr Bishwajeet Pandey is Associate Professor in Jain University, Bangalore, India. He has completed his PhD in CSE from Gran Sasso Science Institute, L'Aquila, Italy under guidance of Prof Paolo Prinetto, Politecnico Di Torino, Italy. He has worked as an Assistant Professor at Department of CSE at Birla Institute of Applied Science, India, Assistant Professor at Department of Research in Chitkara University India, Junior Research Fellow (JRF) at South Asian University and Lecturers in Indira Gandhi National Open University. He has completed Master of Technology (IIIT Gwalior) in CSE with Specialization in VLSI, Master of Computer Application, R&D Project in CDAC-Noida, India. He has authored and coauthored 150+ papers available on his Scopus Profile (https://www.scopus.com/authid/detail.uri?authorId=57203239026). He has 2000+ Citation according to his Google Scholar Profile(https://scholar.google.co.in/citations?user=UZ_8yAMAAAAJ&hl=en). He has an experience of teaching of Cyber Security, Innovation and Startup, Computer Network, Digital Logic, Logic Synthesis, Machine Learning, System Verilog and so on. His area of research interest is Green Computing, High Performance Computing, Cyber Physical System, IoT, and Cyber Security. He is in board of director of many startups of his Students e.g. Gyancity Research Consultancy Pvt Ltd.
Inhaltsangabe
Chapter 1 Introduction to Green Communication Computing (GCC) Chapter 2 Field Programmable Gate Arrays (FPGA) Chapter 3 HDL Coding of GCC Circuits Chapter 4 LVCMOS based UART for GCC Chapter 5 SSTL based UART of GCC Chapter 6 HSTL based UART for GCC Chapter 7 MOBILE DDR based UART for GCC Chapter 8 LVCMOS based FIR Filter for GCC Chapter 9 SSTL based FIR Filter of GCC Chapter 10 HSTL based FIR Filter for GCC Chapter 11 MOBILE DDR based FIR Filter for GCC Chapter 12 LVCMOS based Packet Counter for GCC Chapter 13 SSTL based Packet Counter of GCC Chapter 14 HSTL based Packet Counter for GCC Chapter 15 MOBILE DDR based Packet Counter for GCC
Chapter 1 Introduction to Green Communication Computing (GCC) Chapter 2 Field Programmable Gate Arrays (FPGA) Chapter 3 HDL Coding of GCC Circuits Chapter 4 LVCMOS based UART for GCC Chapter 5 SSTL based UART of GCC Chapter 6 HSTL based UART for GCC Chapter 7 MOBILE DDR based UART for GCC Chapter 8 LVCMOS based FIR Filter for GCC Chapter 9 SSTL based FIR Filter of GCC Chapter 10 HSTL based FIR Filter for GCC Chapter 11 MOBILE DDR based FIR Filter for GCC Chapter 12 LVCMOS based Packet Counter for GCC Chapter 13 SSTL based Packet Counter of GCC Chapter 14 HSTL based Packet Counter for GCC Chapter 15 MOBILE DDR based Packet Counter for GCC
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