Machine Learning Support for Fault Diagnosis of System-on-Chip (eBook, PDF)

Redaktion: Girard, Patrick; Wang, Li-C.; Blanton, Shawn

• Format: PDF

Produktbeschreibung

This book provides a state-of-the-art guide to Machine Learning (ML)-based techniques that have been shown to be highly efficient for diagnosis of failures in electronic circuits and systems. The methods discussed can be used for volume diagnosis after manufacturing or for diagnosis of customer returns. Readers will be enabled to deal with huge amount of insightful test data that cannot be exploited otherwise in an efficient, timely manner. After some background on fault diagnosis and machine learning, the authors explain and apply optimized techniques from the ML domain to solve the fault diagnosis problem in the realm of electronic system design and manufacturing. These techniques can be used for failure isolation in logic or analog circuits, board-level fault diagnosis, or even wafer-level failure cluster identification. Evaluation metrics as well as industrial case studies are used to emphasize the usefulness and benefits of using ML-based diagnosis techniques.

Thebenefits of the book for the reader are:

• Identifies the key challenges in fault diagnosis of system-on-chip and presents the solutions and corresponding results that have emerged from leading-edge research;
• Explains and applies optimized techniques from the machine-learning domain to solve the fault diagnosis problem in the realm of electronic system design and manufacturing;
• Includes necessary background information on testing and diagnosis and a compendium of solutions existing in this field;
• Demonstrates techniques based on industrial data and feedback from actual PFA analysis;
• Discusses practical problems, including test sequence quality, diagnosis resolution, accuracy, time cost, etc.

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Produktdetails

• Verlag: Springer Nature Switzerland
• Seitenzahl: 316
• Erscheinungstermin: 13. März 2023
• Englisch
• ISBN-13: 9783031196393
• Artikelnr.: 67609438

Autorenporträt

Patrick GIRARD received a M.Sc. degree in Electrical Engineering and a Ph.D. degree in Microelectronics from the University of Montpellier, France, in 1988 and 1992 respectively. He also received the "Habilitation à Diriger des Recherches" degree from the University of Montpellier, France, in 2003. He is currently Research Director at CNRS (French National Center for Scientific Research) and works in the Microelectronics Department of the Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM) - France. Patrick Girard is Coordinator of the International Research Project ' INSIMIA ' (French-Italian Research Program on the Integrity of Integrated Systems in the Era of Artificial Intelligence) created in 2021 by the CNRS and the University of Montpellier, France, with the Politecnico di Torino, Italy. Since 2006, he is deputy director of the French scientific network dedicated to research in the fields of System-on-Chip, Embedded Systems and Connected Objects(SOC2), a network composed of 1400 researchers. From 2010 to 2014, he was Director of the Microelectronics Department at LIRMM, at that time composed of about 100 people. His research interests include all aspects of digital and memory circuit test and reliability, with emphasis on critical constraints such as timing and power. Robust design of neuromorphic circuits, test of approximate circuits, as well as machine learning for fault diagnosis are also part of his new research activities. Patrick Girard is Technical Activities Chair of the Test Technology Technical Council (TTTC) of the IEEE Computer Society. From 2006 to 2010, he was Vice-Chair of the European TTTC (ETTTC) of the IEEE Computer Society. He has served on numerous conference committees including ACM/IEEE Design Automation Conference (DAC), ACM/IEEE Design Automation and Test in Europe (DATE), IEEE International Test Conference (ITC), IEEE VLSI Test Symposium (VTS), IEEE European Test Symposium (ETS), IEEE Asian Test Symposium (ATS), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), and IEEE International NEWCAS Conference. Patrick Girard was the founder and Editor-in-Chief of the ASP Journal of Low Power Electronics (JOLPE). He is an Associate Editor of the IEEE Transactions on Emerging Topics in Computing, the IEEE Transactions on Circuits and Systems I: Regular Papers, the IEEE Transactions on Circuits and Systems II: Express Briefs, and the Journal of Electronic Testing (JETTA - Springer). He was formerly an Associate Editor of the IEEE Transactions on VLSI Systems, IEEE Transactions on Computers, and IEEE Transactions on Computer-Aided Design of Circuits and Systems. Patrick Girard has been involved in several (34) European research projects (ESPRIT III ATSEC, EUREKA MEDEA, MEDEA+ ASSOCIATE, IST MARLOW, MEDEA+ NanoTEST, CATRENE TOETS, ENIAC ELESIS, CATRENE MASTER_3D, PENTA HADES), national research projects (ANR, FUI), and industrial research projects with major companies like Infineon Technologies, Intel, Atmel, ST-Ericsson, STMicroelectronics, etc. Patrick Girard has supervised 44 PhD dissertations, and has published 12 books or book chapters, 90 journal papers, and more than 250 conference and symposium papers. He is co-author of 5 patents. He is a Fellow of the IEEE and a Golden Core Member of the IEEE Computer Society. Shawn Blanton is Joseph F. and Nancy Keithley Professor of Electrical and Computer Engineering at Carnegie Mellon University. In 1995 he received his Ph.D. in Electrical Engineering and Computer Science from the University of Michigan, Ann Arbor. His personal research interests include various aspects of integrated system testing and diagnosis, and the development of design methodologiesand tools for securing hardware systems. He has consulted for various companies, and is the founder of TestWorks, a Carnegie Mellon University spinout focused on information extraction from IC test data. He received a Career Award from the National Science Foundation in 1997, and IBM Faculty Partnership Awards in 2005 and 2006. He has given over 100 invited talks at universities and companies and is the recipient of several best-paper awards. He has published nearly 200 refereed conference and journal papers and has 10 U.S. patents or patent applications filed. He has served on various technical program committees and chaired the 2011 program for the International Test Conference. Dr. Blanton is a fellow of the IEEE and senior member of the ACM. Dr. Blanton has served as the Interim Vice Provost for Diversity, Equity, and Inclusion for Carnegie Mellon University 2020-21. In this interim role, he focused on diversifyingthe graduate student and faculty populations across the university, along with enhancing and initiating win-win relationships with the Pittsburgh region. He also served as the Acting Associate Dean for Diversity and Inclusion for the College of Engineering from 2019 to 2020. In this role, he was responsible for developing and executing a DEI strategic plan for the college. Dr. Blanton currently serves as the Associate Head of Research and is responsible for developing and executing department research strategies. Blanton is also significantly involved in the recruitment of underrepresented candidates for graduate school. Most of his activities center on direct recruitment at the annual conventions of various engineering societies that include the National Society of Black Engineers (NSBE), Society of Hispanic Professional Engineers and the American Indian Science and Engineering Society, and he spearheaded the University's efforts for the 2006, 2012 and 2018 NSBE conventions in Pittsburgh. In 2006, Blanton was awarded an Emerald Award for outstanding leadership in recruiting and mentoring minorities for advanced degrees in science and technology, and in 2021 he was awarded the Lifetime Achievement award from the National Society of Black Engineers for exhibiting career technical excellence and leadership in higher education in a career spanning several years. Li-C. Wang is a professor of the Electrical and Computer Engineering Department at University of California, Santa Barbara (UCSB), USA. He received his PhD in 1996 from the University of Texas at Austin, and was previously with Motorola PowerPC Design Center. He joined UCSB in 2000. In the last two decades, his research focused on investigating how machine learning could be applied in electronic design and test flows. Earlier, his research focused on a variety of topics in Electronic Design Automation and Test, including microprocessor test and verification, statistical timing analysis, defect-oriented testing, and Boolean Satisfiability (SAT) solvers. He received 9 best paper awards and 2 honorable mentioned paper awards from major conferences, including the best paper award from International Test Conference (ITC) 2020 and from VLSI Test Symposium 2016. He is the recipient of the 2010 Technical Excellence Award from Semiconductor Research Corporation (SRC) for his research contributions in data mining for test and validation. He is the recipient of the 2017 TTTC Bob Madge Innovation Award. He is an IEEE fellow. He served as the Program Chair for ITC 2016, and as the General Chair for ITC 2017 and ITC 2018. He helped found the ITC-Asia conference in 2017.

Inhaltsangabe

Introduction.- Prerequisites on Fault Diagnosis.- Conventional Methods for Fault Diagnosis.- Machine Learning and Its Applications in Test.- Machine Learning Support for Logic Diagnosis.- Machine Learning Support for Cell-Aware Diagnosis.- Machine Learning Support for Volume Diagnosis.- Machine Learning Support for Diagnosis of Analog Circuits.- Machine Learning Support for Board-level Functional Fault Diagnosis.- Machine Learning Support for Wafer-level Failure Cluster Identification.- Conclusion.