Multi-Mode / Multi-Band RF Transceivers for Wireless Communications (eBook, ePUB)
Advanced Techniques, Architectures, and Trends
Redaktion: Hueber, Gernot; Staszewski, Robert Bogdan
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Multi-Mode / Multi-Band RF Transceivers for Wireless Communications (eBook, ePUB)
Advanced Techniques, Architectures, and Trends
Redaktion: Hueber, Gernot; Staszewski, Robert Bogdan
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* Summarizes cutting-edge physical layer technologies for multi-mode wireless RF transceivers. * Includes original contributions from distinguished researchers and professionals. * Covers cutting-edge physical layer technologies for multi-mode wireless RF transceivers. * Contributors are all leading researchers and professionals in this field.
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* Summarizes cutting-edge physical layer technologies for multi-mode wireless RF transceivers. * Includes original contributions from distinguished researchers and professionals. * Covers cutting-edge physical layer technologies for multi-mode wireless RF transceivers. * Contributors are all leading researchers and professionals in this field.
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Produktdetails
- Produktdetails
- Verlag: Jossey-Bass
- Seitenzahl: 608
- Erscheinungstermin: 4. April 2011
- Englisch
- ISBN-13: 9781118102206
- Artikelnr.: 37344513
- Verlag: Jossey-Bass
- Seitenzahl: 608
- Erscheinungstermin: 4. April 2011
- Englisch
- ISBN-13: 9781118102206
- Artikelnr.: 37344513
- Herstellerkennzeichnung Die Herstellerinformationen sind derzeit nicht verfügbar.
GERNOT HUEBER earned his PhD at the University of Linz, Austria, in 2006. His thesis was "Advanced Concept and Design of Multi-Mode/Multi-System Receivers for Cellular Terminal RFICs." Dr.??Hueber is head of RF Innovations group at DICE GmbH & Co. KG in Linz, Austria, with main responsibility for the research in cellular transceivers. ROBERT BOGDAN STASZEWSKI is a senior design engineer and researcher with over eighteen years of diverse industrial experience in microelectronics and communication systems. Dr. Staszewski earned his PhD in electrical engineering at the University of Texas at Dallas, in 2002, for his work on all-digital PLLs. He is currently Associate Professor at Delft University of Technology in the Netherlands. He is an IEEE Fellow.
Contributors xi Preface xiii I Transceiver Concepts and Design 1 1 Software-Defined Radio Front Ends 3 Jan Craninckx 1.1 Introduction 3 1.2 System-Level Considerations 4 1.3 Wideband LO Synthesis 5 1.4 Receiver Building Blocks 12 1.5 Transmitter Building Blocks 23 1.6 Calibration Techniques 25 1.7 Full SDR Implementation 27 1.8 Conclusions 30 References 30 2 Software-Defined Transceivers 33 Gio Cafaro and Bob Stengel 2.1 Introduction 33 2.2 Radio Architectures 34 2.3 SDR Building Blocks 34 2.4 Example of an SDR Transceiver 54 References 60 3 Adaptive Multi-Mode RF Front-End Circuits 65 Aleksandar Tasic 3.1 Introduction 65 3.2 Adaptive Multi-Mode Low-Power Wireless RF IC Design 66 3.3 Multi-Mode Receiver Concept 68 3.4 Design of a Multi-Mode Adaptive RF Front End 70 3.5 Experimental Results for the Image-Reject Down-Converter 76 3.6 Conclusions 80 References 81 4 Precise Delay Alignment Between Amplitude and Phase/ Frequency Modulation Paths in a Digital Polar Transmitter 85 Khurram Waheed and Robert Bogdan Staszewski 4.1 Introduction 85 4.2 RF Polar Transmitter in Nanoscale CMOS 87 4.3 Amplitude and Phase Modulation 90 4.4 Mechanisms to Achieve Subnanosecond Amplitude and Phase Modulation Path Alignments 96 4.5 Precise Alignment of Multi-Rate Direct and Reference Point Data 101 References 109 5 Overview of Front-End RF Passive Integration into SoCs 113 Hooman Darabi 5.1 Introduction 113 5.2 The Concept of a Receiver Translational Loop 119 5.3 Feedforward Loop Nonideal Effects 122 5.4 Feedforward Receiver Circuit Implementations 125 5.5 Feedforward Receiver Experimental Results 129 5.6 Feedback Notch Filtering for a WCDMA Transmitter 133 5.7 Feedback-Based Transmitter Stability Analysis 138 5.8 Impacts of Nonidealities in Feedback-Based Transmission 141 5.9 Transmitter Building Blocks 148 5.10 Feedback-Based Transmitter Measurement Results 150 5.11 Conclusions and Discussion 153 Appendix 155 References 156 6 ADCs and DACs for Software-Defined Radio 159 Michiel Steyaert, Pieter Palmers, and Koen Cornelissens 6.1 Introduction 159 6.2 ADC and DAC Requirements in Wireless Systems 160 6.3 Multi-Standard Transceiver Architectures 162 6.4 Evaluating Reconfigurability 165 6.5 ADCs for Software-Defined Radio 166 6.6 DACs for Software-Defined Radio 172 6.7 Conclusions 184 References 184 II Receiver Design 187 7 OFDM Transform-Domain Receivers for Multi-Standard Communications 189 Sebastian Hoyos 7.1 Introduction 189 7.2 Transform-Domain Receiver Background 190 7.3 Transform-Domain Sampling Receiver 191 7.4 Digital Baseband Design for the TD Receiver 195 7.5 A Comparative Study 204 7.6 Simulations 208 7.7 Gain-Bandwidth Product Requirement for an Op-Amp in a Charge-Sampling Circuit 211 7.8 Sparsity of (GHG)
1 213 7.9 Applications 214 7.10 Conclusions 215 References 216 8 Discrete-Time Processing of RF Signals 219 Renaldi Winoto and Borivoje Nikolic 8.1 Introduction 219 8.2 Scaling of an MOS Switch 221 8.3 Sampling Mixer 223 8.4 Filter Synthesis 226 8.5 Noise in Switched-Capacitor Filters 234 8.6 Circuit-Design Considerations 237 8.7 Perspective and Outlook 242 References 244 9 Oversampled ADC Using VCO-Based Quantizers 247 Matthew Z. Straayer and Michael H. Perrott 9.1 Introduction 247 9.2 VCO-Quantizer Background 248 9.3 SNDR Limitations for VCO-Based Quantization 252 9.4 VCO Quantizer
ADC Architecture 257 9.5 Prototype
ADC Example with a VCO Quantizer 265 9.6 Conclusions 275 References 276 10 Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals 279 Naveen K. Yanduru 10.1 Introduction 279 10.2 Mobile Terminal Challenges 280 10.3 Research Directions Toward a Multi-Band Receiver 282 10.4 Multi-Mode Receiver Principles and RF System Analysis for a W-CDMA Receiver 286 10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage SAW Filter 292 10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS 299 10.7 RX Front-End Performance Comparison 305 References 305 11 Digitally Enhanced Alternate Path Linearization of RF Receivers 309 Edward A.Keehr and Ali Hajimiri 11.1 Introduction 309 11.2 Adaptive Feedforward Error Cancellation 311 11.3 Architectural Concepts 313 11.4 Alternate Feedforward Path Block Design Considerations 320 11.5 Experimental Design of an Adaptively Linearized UMTS Receiver 331 11.6 Experimental Results of an Adaptively Linearized UMTS Receiver 336 11.7 Conclusions 341 References 343 III Transmitter Techniques 347 12 Linearity and Efficiency Strategies for Next-Generation Wireless Communications 349 Lawrence Larson, Peter Asbeck, and Donald Kimball 12.1 Introduction 349 12.2 Power Amplifier Function 349 12.3 Power Amplifier Efficiency Enhancement 354 12.4 Techniques for Linearity Enhancement 362 12.5 Conclusions 371 References 372 13 CMOS RF Power Amplifiers for Mobile Communications 377 Patrick Reynaert 13.1 Introduction 377 13.2 Challenges 378 13.3 Low Supply Voltage 378 13.4 Average Efficiency, Dynamic Range, and Linearity 381 13.5 Polar Modulation 386 13.6 Distortion in a Polar-Modulated Power Amplifier 390 13.7 Design and Implementation of a Polar-Modulated Power Amplifier 397 13.8 Conclusions 408 References 408 14 Digitally Assisted RF Architectures: Two Illustrative Designs 411 Joel L. Dawson 14.1 Introduction 411 14.2 Cartesian Feedback: The Analog Problem 412 14.3 Digital Assistance for Cartesian Feedback 416 14.4 Multipliers, Squarers, Mixers, and VGAs: The Analog Problem 427 14.5 Digital Assistance for Analog Multipliers 429 14.6 Summary 435 Appendix: Stability Analysis for Cartesian Feedback Systems 436 References 447 IV Digital Signal Processing for RF Transceivers 451 15 RF Impairment Compensation for Future Radio Systems 453 Mikko Valkama 15.1 Introduction and Motivation 453 15.2 Typical RF Impairments 454 15.3 Impairment Mitigation Principles 469 15.4 Case Studies in I/Q Imbalance Compensation 480 15.5 Conclusions 487 References 488 16 Techniques for the Analysis of Digital Bang-Bang PLLs 497 Nicola Da Dalt 16.1 Introduction 497 16.2 Digital Bang-Bang PLL Architecture 498 16.3 Analysis of the Nonlinear Dynamics of the BBPLL 499 16.4 Analysis of the BBPLL with Markov Chains 503 16.5 Linearization of the BBPLL 508 16.6 Comparison of Measurements and Models 526 References 531 17 Low-Power Spectrum Processors for Cognitive Radios 533 Joy Laskar and Kyutae Lim 17.1 Introduction 533 17.2 Paradigm Shift from SDR to CR 534 17.3 Challenge and Trends in RFIC/System 535 17.4 Analog Signal Processing 536 17.5 Spectrum Sensing 537 17.6 Multi-Resolution Spectrum Sensing 538 17.7 MRSS Performance 542 17.8 Conclusions 555 References 556 Index 557
1 213 7.9 Applications 214 7.10 Conclusions 215 References 216 8 Discrete-Time Processing of RF Signals 219 Renaldi Winoto and Borivoje Nikolic 8.1 Introduction 219 8.2 Scaling of an MOS Switch 221 8.3 Sampling Mixer 223 8.4 Filter Synthesis 226 8.5 Noise in Switched-Capacitor Filters 234 8.6 Circuit-Design Considerations 237 8.7 Perspective and Outlook 242 References 244 9 Oversampled ADC Using VCO-Based Quantizers 247 Matthew Z. Straayer and Michael H. Perrott 9.1 Introduction 247 9.2 VCO-Quantizer Background 248 9.3 SNDR Limitations for VCO-Based Quantization 252 9.4 VCO Quantizer
ADC Architecture 257 9.5 Prototype
ADC Example with a VCO Quantizer 265 9.6 Conclusions 275 References 276 10 Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals 279 Naveen K. Yanduru 10.1 Introduction 279 10.2 Mobile Terminal Challenges 280 10.3 Research Directions Toward a Multi-Band Receiver 282 10.4 Multi-Mode Receiver Principles and RF System Analysis for a W-CDMA Receiver 286 10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage SAW Filter 292 10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS 299 10.7 RX Front-End Performance Comparison 305 References 305 11 Digitally Enhanced Alternate Path Linearization of RF Receivers 309 Edward A.Keehr and Ali Hajimiri 11.1 Introduction 309 11.2 Adaptive Feedforward Error Cancellation 311 11.3 Architectural Concepts 313 11.4 Alternate Feedforward Path Block Design Considerations 320 11.5 Experimental Design of an Adaptively Linearized UMTS Receiver 331 11.6 Experimental Results of an Adaptively Linearized UMTS Receiver 336 11.7 Conclusions 341 References 343 III Transmitter Techniques 347 12 Linearity and Efficiency Strategies for Next-Generation Wireless Communications 349 Lawrence Larson, Peter Asbeck, and Donald Kimball 12.1 Introduction 349 12.2 Power Amplifier Function 349 12.3 Power Amplifier Efficiency Enhancement 354 12.4 Techniques for Linearity Enhancement 362 12.5 Conclusions 371 References 372 13 CMOS RF Power Amplifiers for Mobile Communications 377 Patrick Reynaert 13.1 Introduction 377 13.2 Challenges 378 13.3 Low Supply Voltage 378 13.4 Average Efficiency, Dynamic Range, and Linearity 381 13.5 Polar Modulation 386 13.6 Distortion in a Polar-Modulated Power Amplifier 390 13.7 Design and Implementation of a Polar-Modulated Power Amplifier 397 13.8 Conclusions 408 References 408 14 Digitally Assisted RF Architectures: Two Illustrative Designs 411 Joel L. Dawson 14.1 Introduction 411 14.2 Cartesian Feedback: The Analog Problem 412 14.3 Digital Assistance for Cartesian Feedback 416 14.4 Multipliers, Squarers, Mixers, and VGAs: The Analog Problem 427 14.5 Digital Assistance for Analog Multipliers 429 14.6 Summary 435 Appendix: Stability Analysis for Cartesian Feedback Systems 436 References 447 IV Digital Signal Processing for RF Transceivers 451 15 RF Impairment Compensation for Future Radio Systems 453 Mikko Valkama 15.1 Introduction and Motivation 453 15.2 Typical RF Impairments 454 15.3 Impairment Mitigation Principles 469 15.4 Case Studies in I/Q Imbalance Compensation 480 15.5 Conclusions 487 References 488 16 Techniques for the Analysis of Digital Bang-Bang PLLs 497 Nicola Da Dalt 16.1 Introduction 497 16.2 Digital Bang-Bang PLL Architecture 498 16.3 Analysis of the Nonlinear Dynamics of the BBPLL 499 16.4 Analysis of the BBPLL with Markov Chains 503 16.5 Linearization of the BBPLL 508 16.6 Comparison of Measurements and Models 526 References 531 17 Low-Power Spectrum Processors for Cognitive Radios 533 Joy Laskar and Kyutae Lim 17.1 Introduction 533 17.2 Paradigm Shift from SDR to CR 534 17.3 Challenge and Trends in RFIC/System 535 17.4 Analog Signal Processing 536 17.5 Spectrum Sensing 537 17.6 Multi-Resolution Spectrum Sensing 538 17.7 MRSS Performance 542 17.8 Conclusions 555 References 556 Index 557
Contributors xi Preface xiii I Transceiver Concepts and Design 1 1 Software-Defined Radio Front Ends 3 Jan Craninckx 1.1 Introduction 3 1.2 System-Level Considerations 4 1.3 Wideband LO Synthesis 5 1.4 Receiver Building Blocks 12 1.5 Transmitter Building Blocks 23 1.6 Calibration Techniques 25 1.7 Full SDR Implementation 27 1.8 Conclusions 30 References 30 2 Software-Defined Transceivers 33 Gio Cafaro and Bob Stengel 2.1 Introduction 33 2.2 Radio Architectures 34 2.3 SDR Building Blocks 34 2.4 Example of an SDR Transceiver 54 References 60 3 Adaptive Multi-Mode RF Front-End Circuits 65 Aleksandar Tasic 3.1 Introduction 65 3.2 Adaptive Multi-Mode Low-Power Wireless RF IC Design 66 3.3 Multi-Mode Receiver Concept 68 3.4 Design of a Multi-Mode Adaptive RF Front End 70 3.5 Experimental Results for the Image-Reject Down-Converter 76 3.6 Conclusions 80 References 81 4 Precise Delay Alignment Between Amplitude and Phase/ Frequency Modulation Paths in a Digital Polar Transmitter 85 Khurram Waheed and Robert Bogdan Staszewski 4.1 Introduction 85 4.2 RF Polar Transmitter in Nanoscale CMOS 87 4.3 Amplitude and Phase Modulation 90 4.4 Mechanisms to Achieve Subnanosecond Amplitude and Phase Modulation Path Alignments 96 4.5 Precise Alignment of Multi-Rate Direct and Reference Point Data 101 References 109 5 Overview of Front-End RF Passive Integration into SoCs 113 Hooman Darabi 5.1 Introduction 113 5.2 The Concept of a Receiver Translational Loop 119 5.3 Feedforward Loop Nonideal Effects 122 5.4 Feedforward Receiver Circuit Implementations 125 5.5 Feedforward Receiver Experimental Results 129 5.6 Feedback Notch Filtering for a WCDMA Transmitter 133 5.7 Feedback-Based Transmitter Stability Analysis 138 5.8 Impacts of Nonidealities in Feedback-Based Transmission 141 5.9 Transmitter Building Blocks 148 5.10 Feedback-Based Transmitter Measurement Results 150 5.11 Conclusions and Discussion 153 Appendix 155 References 156 6 ADCs and DACs for Software-Defined Radio 159 Michiel Steyaert, Pieter Palmers, and Koen Cornelissens 6.1 Introduction 159 6.2 ADC and DAC Requirements in Wireless Systems 160 6.3 Multi-Standard Transceiver Architectures 162 6.4 Evaluating Reconfigurability 165 6.5 ADCs for Software-Defined Radio 166 6.6 DACs for Software-Defined Radio 172 6.7 Conclusions 184 References 184 II Receiver Design 187 7 OFDM Transform-Domain Receivers for Multi-Standard Communications 189 Sebastian Hoyos 7.1 Introduction 189 7.2 Transform-Domain Receiver Background 190 7.3 Transform-Domain Sampling Receiver 191 7.4 Digital Baseband Design for the TD Receiver 195 7.5 A Comparative Study 204 7.6 Simulations 208 7.7 Gain-Bandwidth Product Requirement for an Op-Amp in a Charge-Sampling Circuit 211 7.8 Sparsity of (GHG)
1 213 7.9 Applications 214 7.10 Conclusions 215 References 216 8 Discrete-Time Processing of RF Signals 219 Renaldi Winoto and Borivoje Nikolic 8.1 Introduction 219 8.2 Scaling of an MOS Switch 221 8.3 Sampling Mixer 223 8.4 Filter Synthesis 226 8.5 Noise in Switched-Capacitor Filters 234 8.6 Circuit-Design Considerations 237 8.7 Perspective and Outlook 242 References 244 9 Oversampled ADC Using VCO-Based Quantizers 247 Matthew Z. Straayer and Michael H. Perrott 9.1 Introduction 247 9.2 VCO-Quantizer Background 248 9.3 SNDR Limitations for VCO-Based Quantization 252 9.4 VCO Quantizer
ADC Architecture 257 9.5 Prototype
ADC Example with a VCO Quantizer 265 9.6 Conclusions 275 References 276 10 Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals 279 Naveen K. Yanduru 10.1 Introduction 279 10.2 Mobile Terminal Challenges 280 10.3 Research Directions Toward a Multi-Band Receiver 282 10.4 Multi-Mode Receiver Principles and RF System Analysis for a W-CDMA Receiver 286 10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage SAW Filter 292 10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS 299 10.7 RX Front-End Performance Comparison 305 References 305 11 Digitally Enhanced Alternate Path Linearization of RF Receivers 309 Edward A.Keehr and Ali Hajimiri 11.1 Introduction 309 11.2 Adaptive Feedforward Error Cancellation 311 11.3 Architectural Concepts 313 11.4 Alternate Feedforward Path Block Design Considerations 320 11.5 Experimental Design of an Adaptively Linearized UMTS Receiver 331 11.6 Experimental Results of an Adaptively Linearized UMTS Receiver 336 11.7 Conclusions 341 References 343 III Transmitter Techniques 347 12 Linearity and Efficiency Strategies for Next-Generation Wireless Communications 349 Lawrence Larson, Peter Asbeck, and Donald Kimball 12.1 Introduction 349 12.2 Power Amplifier Function 349 12.3 Power Amplifier Efficiency Enhancement 354 12.4 Techniques for Linearity Enhancement 362 12.5 Conclusions 371 References 372 13 CMOS RF Power Amplifiers for Mobile Communications 377 Patrick Reynaert 13.1 Introduction 377 13.2 Challenges 378 13.3 Low Supply Voltage 378 13.4 Average Efficiency, Dynamic Range, and Linearity 381 13.5 Polar Modulation 386 13.6 Distortion in a Polar-Modulated Power Amplifier 390 13.7 Design and Implementation of a Polar-Modulated Power Amplifier 397 13.8 Conclusions 408 References 408 14 Digitally Assisted RF Architectures: Two Illustrative Designs 411 Joel L. Dawson 14.1 Introduction 411 14.2 Cartesian Feedback: The Analog Problem 412 14.3 Digital Assistance for Cartesian Feedback 416 14.4 Multipliers, Squarers, Mixers, and VGAs: The Analog Problem 427 14.5 Digital Assistance for Analog Multipliers 429 14.6 Summary 435 Appendix: Stability Analysis for Cartesian Feedback Systems 436 References 447 IV Digital Signal Processing for RF Transceivers 451 15 RF Impairment Compensation for Future Radio Systems 453 Mikko Valkama 15.1 Introduction and Motivation 453 15.2 Typical RF Impairments 454 15.3 Impairment Mitigation Principles 469 15.4 Case Studies in I/Q Imbalance Compensation 480 15.5 Conclusions 487 References 488 16 Techniques for the Analysis of Digital Bang-Bang PLLs 497 Nicola Da Dalt 16.1 Introduction 497 16.2 Digital Bang-Bang PLL Architecture 498 16.3 Analysis of the Nonlinear Dynamics of the BBPLL 499 16.4 Analysis of the BBPLL with Markov Chains 503 16.5 Linearization of the BBPLL 508 16.6 Comparison of Measurements and Models 526 References 531 17 Low-Power Spectrum Processors for Cognitive Radios 533 Joy Laskar and Kyutae Lim 17.1 Introduction 533 17.2 Paradigm Shift from SDR to CR 534 17.3 Challenge and Trends in RFIC/System 535 17.4 Analog Signal Processing 536 17.5 Spectrum Sensing 537 17.6 Multi-Resolution Spectrum Sensing 538 17.7 MRSS Performance 542 17.8 Conclusions 555 References 556 Index 557
1 213 7.9 Applications 214 7.10 Conclusions 215 References 216 8 Discrete-Time Processing of RF Signals 219 Renaldi Winoto and Borivoje Nikolic 8.1 Introduction 219 8.2 Scaling of an MOS Switch 221 8.3 Sampling Mixer 223 8.4 Filter Synthesis 226 8.5 Noise in Switched-Capacitor Filters 234 8.6 Circuit-Design Considerations 237 8.7 Perspective and Outlook 242 References 244 9 Oversampled ADC Using VCO-Based Quantizers 247 Matthew Z. Straayer and Michael H. Perrott 9.1 Introduction 247 9.2 VCO-Quantizer Background 248 9.3 SNDR Limitations for VCO-Based Quantization 252 9.4 VCO Quantizer
ADC Architecture 257 9.5 Prototype
ADC Example with a VCO Quantizer 265 9.6 Conclusions 275 References 276 10 Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals 279 Naveen K. Yanduru 10.1 Introduction 279 10.2 Mobile Terminal Challenges 280 10.3 Research Directions Toward a Multi-Band Receiver 282 10.4 Multi-Mode Receiver Principles and RF System Analysis for a W-CDMA Receiver 286 10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage SAW Filter 292 10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS 299 10.7 RX Front-End Performance Comparison 305 References 305 11 Digitally Enhanced Alternate Path Linearization of RF Receivers 309 Edward A.Keehr and Ali Hajimiri 11.1 Introduction 309 11.2 Adaptive Feedforward Error Cancellation 311 11.3 Architectural Concepts 313 11.4 Alternate Feedforward Path Block Design Considerations 320 11.5 Experimental Design of an Adaptively Linearized UMTS Receiver 331 11.6 Experimental Results of an Adaptively Linearized UMTS Receiver 336 11.7 Conclusions 341 References 343 III Transmitter Techniques 347 12 Linearity and Efficiency Strategies for Next-Generation Wireless Communications 349 Lawrence Larson, Peter Asbeck, and Donald Kimball 12.1 Introduction 349 12.2 Power Amplifier Function 349 12.3 Power Amplifier Efficiency Enhancement 354 12.4 Techniques for Linearity Enhancement 362 12.5 Conclusions 371 References 372 13 CMOS RF Power Amplifiers for Mobile Communications 377 Patrick Reynaert 13.1 Introduction 377 13.2 Challenges 378 13.3 Low Supply Voltage 378 13.4 Average Efficiency, Dynamic Range, and Linearity 381 13.5 Polar Modulation 386 13.6 Distortion in a Polar-Modulated Power Amplifier 390 13.7 Design and Implementation of a Polar-Modulated Power Amplifier 397 13.8 Conclusions 408 References 408 14 Digitally Assisted RF Architectures: Two Illustrative Designs 411 Joel L. Dawson 14.1 Introduction 411 14.2 Cartesian Feedback: The Analog Problem 412 14.3 Digital Assistance for Cartesian Feedback 416 14.4 Multipliers, Squarers, Mixers, and VGAs: The Analog Problem 427 14.5 Digital Assistance for Analog Multipliers 429 14.6 Summary 435 Appendix: Stability Analysis for Cartesian Feedback Systems 436 References 447 IV Digital Signal Processing for RF Transceivers 451 15 RF Impairment Compensation for Future Radio Systems 453 Mikko Valkama 15.1 Introduction and Motivation 453 15.2 Typical RF Impairments 454 15.3 Impairment Mitigation Principles 469 15.4 Case Studies in I/Q Imbalance Compensation 480 15.5 Conclusions 487 References 488 16 Techniques for the Analysis of Digital Bang-Bang PLLs 497 Nicola Da Dalt 16.1 Introduction 497 16.2 Digital Bang-Bang PLL Architecture 498 16.3 Analysis of the Nonlinear Dynamics of the BBPLL 499 16.4 Analysis of the BBPLL with Markov Chains 503 16.5 Linearization of the BBPLL 508 16.6 Comparison of Measurements and Models 526 References 531 17 Low-Power Spectrum Processors for Cognitive Radios 533 Joy Laskar and Kyutae Lim 17.1 Introduction 533 17.2 Paradigm Shift from SDR to CR 534 17.3 Challenge and Trends in RFIC/System 535 17.4 Analog Signal Processing 536 17.5 Spectrum Sensing 537 17.6 Multi-Resolution Spectrum Sensing 538 17.7 MRSS Performance 542 17.8 Conclusions 555 References 556 Index 557