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Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems , an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such…mehr
Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.
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Autorenporträt
Akash Kumar was born in Bijnor, India on November 13, 1980. After finishing the middle high-school at the Dayawati Modi Academy in Rampur, India in 1996, he proceeded to Raffles Junior College, Singapore for his pre-university education. In 2002, he completed Bachelors in Computer Engineering (First Class Honours) from the National University of Singapore (NUS), and in 2004 he completed joint Masters in Technological Design (Embedded Systems) from Eindhoven University of Technology (TUe) and NUS. In 2005, he began working towards his joint Ph.D. degree from TUe and NUS in the Electronic Systems group and Electical and Computer Engineering department respectively. His research was funded by STW within the PreMaDoNA project. It has led, among others, to several publications and this book. Presently, Akash is a visiting fellow at the Department of Electrical and Computer Engineering, NUS, Singapore. His research interests include analysis, design methodologies, and resource management of multi-processor systems.
Henk Corporaal has gained a MSc in Theoretical Physics from the University of Groningen, and a PhD in Electrical Engineering, in the area of Computer Architecture, from Delft University of Technology. Corporaal has been teaching at several schools for higher education, has been associate professor at the Delft University of Technology in the field of computer architecture and code generation, had a joint professor appointment at the National University of Singapore, and has been scientific director of the joined NUS-TUE Design Technology Institute. He also has been department head and chief scientist within the DESICS (Design Technology for Integrated Information and Communication Systems) division at IMEC, Leuven (Belgium). Currently Corporaal is Professor in Embedded System Architectures at the Einhoven University of Technology (TU/e) in The Netherlands. He has co-authored over 250 journal and conference papers in the (multi-)processor architecture and embedded system design area. Furthermore he invented a new class of VLIW architectures, the Transport Triggered Architectures, which is used in several commercial products, and by many research groups. His current research projects are on the predictable design of soft- and hard real-time embedded systems.
Bart Mesman obtained his Ph.D. from the Eindhoven University of Technology in 2001. His thesis discusses an efficient constraint-satisfaction method for scheduling operations on a distributed VLIW processor architecture with highly constrained register files with stringent timing requirements. He has worked at Philips Research from 1995-2005 on DSP processor architectures and compilation. Dr. Mesman is currently employed by Eindhoven University. His research interests include (multi-)processor architectures, compile-time and run-time scheduling, and resource management in multi-media devices.
Yajun Ha received the BS degree in Electrical Engineering from Zhejiang University, Hangzhou, China, in 1996, the MEng degree in Electrical Engineering from the National University of Singapore (NUS), Singapore, in 1999, and the PhD degree in Electrical Engineering from Katholieke Universiteit Leuven, Leuven, Belgium, in 2004. He has been an assistant professor at the Department of Electrical and Computer Engineering, NUS, since 2004. Between 1999 and 2004, he did his PhD research project at IMEC, Leuven. His research interests lie in the embedded system architecture and design methodologies, particularly in the area of reconfigurable computing. He has held a US patent and published more than 50 internationally refereed technical papers in his interested areas.
Inhaltsangabe
Trends and Challenges in Multimedia Systems.- Application Modeling and Scheduling.- Probabilistic Performance Prediction.- Resource Management.- Multiprocessor System Design and Synthesis.- Multiple Use-cases System Design.- Conclusions and Open Problems.
Trends and Challenges in Multimedia Systems.- Application Modeling and Scheduling.- Probabilistic Performance Prediction.- Resource Management.- Multiprocessor System Design and Synthesis.- Multiple Use-cases System Design.- Conclusions and Open Problems.
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