Afreen Khursheed, Kavita Khare
Nano Interconnects (eBook, PDF)
Device Physics, Modeling and Simulation
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Afreen Khursheed, Kavita Khare
Nano Interconnects (eBook, PDF)
Device Physics, Modeling and Simulation
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The comprehensive textbook provides the electrical and thermal circuit modelling of carbon allotropes in a simplified and detailed manner. It will as an ideal study material for senior undergraduate and graduate students in the field of electrical engineering, electronics and communications engineering.
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The comprehensive textbook provides the electrical and thermal circuit modelling of carbon allotropes in a simplified and detailed manner. It will as an ideal study material for senior undergraduate and graduate students in the field of electrical engineering, electronics and communications engineering.
Dieser Download kann aus rechtlichen Gründen nur mit Rechnungsadresse in A, B, BG, CY, CZ, D, DK, EW, E, FIN, F, GR, HR, H, IRL, I, LT, L, LR, M, NL, PL, P, R, S, SLO, SK ausgeliefert werden.
Produktdetails
- Produktdetails
- Verlag: Taylor & Francis
- Seitenzahl: 238
- Erscheinungstermin: 23. Dezember 2021
- Englisch
- ISBN-13: 9781000504293
- Artikelnr.: 62911913
- Verlag: Taylor & Francis
- Seitenzahl: 238
- Erscheinungstermin: 23. Dezember 2021
- Englisch
- ISBN-13: 9781000504293
- Artikelnr.: 62911913
- Herstellerkennzeichnung Die Herstellerinformationen sind derzeit nicht verfügbar.
Dr Afreen Khursheed is working as Assistant professor in IIIT Bhopal. She has received B.E (EC) with honours in 2005 & M.Tech with honours in 2009 in VLSI and EMBEDDED SYSTEM from M.A.N.I.T, Bhopal. She earned her Doctorate in Nanotechnology from M.A.N.I.T, Bhopal. She has got 13 years of teaching and research experience, and has successfully guided M.Tech thesis. To her credit, Dr Afreen has publications in various international conferences and SCI (Q1/Q2) indexed journals, and is co author of two books on Low Power VLSI Design. Dr Afreen has also reviewed manuscripts for international journals and also served as the editorial board member of UGC journals and conferences. She has presented Poster and also delivered lectures in various national and international events and conferences held at M.A.N.I.T, Texas A and M University, Qatar university etc. Her area of interest includes high speed nanoelectronic circuit modelling for portable devices. Ultra low power subthreshold circuit simulation and device modelling using CNT and GNR. Her current area of interdisciplinary research focuses on VLSI implementation on a real-time operating system using spintronics.
Dr. Kavita Khare received her B.Tech degree in Electronics and Communication Engineering in 1989, M.Tech. degree in Digital Communication Systems in 1993 and Ph.D. degree in the field of VLSI Design in 2004. She has got nearly 25 years teaching experience. She has 190 publications in various international conferences and journals like IEEE, springer, Elsivier, Oxford press, Hindawi, European Transactions on Telecommunications, Inderscience publications., Taylor and Fancis, CSIR (NISCAIR), AMSE . She has guided nearly 14 PhD thesis and nearly 34 Mtech thesis. She got best paper award at International Conference at France. She is Coordinator of Short term Courses on VLSI Design organized at MANIT Bhopal. She is Reviewer of Papers of IEEE Jour. Of Circuits & Systems, Microelectronics Journal, Elsevier, International Journal AMSE (France), Institute of Engineers and many International Conferences. She is Editor/ Chief Advisory Board Member of some International Journals. Currently, she is working as Professor and Head Dept of Electronics and Communication Engineering in MANIT, Bhopal, INDIA. Her fields of interest are VLSI design and Communication Systems. Her research mainly includes design of arithmetic circuits and various communication algorithms related to synchronization, estimation and routing. She is a Fellow IETE (India) and member of IEEE , Life Member ISTE .
Dr. Kavita Khare received her B.Tech degree in Electronics and Communication Engineering in 1989, M.Tech. degree in Digital Communication Systems in 1993 and Ph.D. degree in the field of VLSI Design in 2004. She has got nearly 25 years teaching experience. She has 190 publications in various international conferences and journals like IEEE, springer, Elsivier, Oxford press, Hindawi, European Transactions on Telecommunications, Inderscience publications., Taylor and Fancis, CSIR (NISCAIR), AMSE . She has guided nearly 14 PhD thesis and nearly 34 Mtech thesis. She got best paper award at International Conference at France. She is Coordinator of Short term Courses on VLSI Design organized at MANIT Bhopal. She is Reviewer of Papers of IEEE Jour. Of Circuits & Systems, Microelectronics Journal, Elsevier, International Journal AMSE (France), Institute of Engineers and many International Conferences. She is Editor/ Chief Advisory Board Member of some International Journals. Currently, she is working as Professor and Head Dept of Electronics and Communication Engineering in MANIT, Bhopal, INDIA. Her fields of interest are VLSI design and Communication Systems. Her research mainly includes design of arithmetic circuits and various communication algorithms related to synchronization, estimation and routing. She is a Fellow IETE (India) and member of IEEE , Life Member ISTE .
Contents
List of Figures
..........................................................................................................ix
List of
Tables..........................................................................................................xiii
Preface....................................................................................................................xvii
Acknowledgments...................................................................................................xix
About the Authors
..................................................................................................xxi
Chapter 1 Prefatory Concepts and More
.............................................................1
Chapter 2 Interconnect
Modeling.......................................................................21
Chapter 3 Repeater Buffer
Modeling...............................................................103
Chapter 4 Signal Integrity
Analysis.................................................................175
Index......................................................................................................................213
List of Figures
..........................................................................................................ix
List of
Tables..........................................................................................................xiii
Preface....................................................................................................................xvii
Acknowledgments...................................................................................................xix
About the Authors
..................................................................................................xxi
Chapter 1 Prefatory Concepts and More
.............................................................1
Chapter 2 Interconnect
Modeling.......................................................................21
Chapter 3 Repeater Buffer
Modeling...............................................................103
Chapter 4 Signal Integrity
Analysis.................................................................175
Index......................................................................................................................213
Contents
List of Figures
..........................................................................................................ix
List of
Tables..........................................................................................................xiii
Preface....................................................................................................................xvii
Acknowledgments...................................................................................................xix
About the Authors
..................................................................................................xxi
Chapter 1 Prefatory Concepts and More
.............................................................1
Chapter 2 Interconnect
Modeling.......................................................................21
Chapter 3 Repeater Buffer
Modeling...............................................................103
Chapter 4 Signal Integrity
Analysis.................................................................175
Index......................................................................................................................213
List of Figures
..........................................................................................................ix
List of
Tables..........................................................................................................xiii
Preface....................................................................................................................xvii
Acknowledgments...................................................................................................xix
About the Authors
..................................................................................................xxi
Chapter 1 Prefatory Concepts and More
.............................................................1
Chapter 2 Interconnect
Modeling.......................................................................21
Chapter 3 Repeater Buffer
Modeling...............................................................103
Chapter 4 Signal Integrity
Analysis.................................................................175
Index......................................................................................................................213