This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time.
"Book gives wide perspectives on the technical insights of fundamentals of sources and mitigation strategies of soft error rates in semiconductor memory devices ... . a valuable addition to a scientific library, as well as served as good introduction for memory reliability engineers or specialists and industrials involved in the field of memory device reliability. This book is highly recommended for people who desire a better understanding of the theory and practice of SER and technical considerations in SER mitigations." (Chong Leong Gan, Microelectronics Reliability, Vol. 74 (81), 2017)