Chris Spear

SystemVerilog for Verification (eBook, PDF)

A Guide to Learning the Testbench Language Features

• Format: PDF

Produktbeschreibung

New! Expanded! Updated!

Based on the bestselling first edition this extensively revised second edition includes the relevant changes that apply to the 2008 version of the SystemVerilog Language Reference Manual (LRM). Significant changes include:

• The revision of nearly every explanation and code sample



• The inclusion of new chapters: "A Complete SystemVerilog Testbench" with a complete constrained random testbench for an ATM switch and "Interfacing with C" on the DPI (Directed Programming Interface)
• The addition of 70 new examples including larger ones such as a directed testbench at the end of chapter four



• An expanded index with 50% more entries and cross references

"As digital integrated circuits relentlessly march towards a billion transistors and beyond, Verilog testbenches are running out of steam. With logic verification taking more effort than design, moving to a higher level of abstraction is the only choice. SystemVerilog appears to be the winner in the high-level verification language market and "SystemVerilog for Verification" is the book that will take working professionals and students alike from basic Verilog to the sophisticated structures needed to verify large and complex designs."

Ronald W. Mehler, Professor of Electrical and Computer Engineering, California State University Northridge

"It can be difficult to improve upon a great book, but Chris has achieved that goal - the second edition of this book is even better than the first! The explanations of abstract verification constructs are more detailed, and many more comprehensive examples make it easier to see how to apply SystemVerilog in object-oriented verification. The new chapter on the SystemVerilog Direct Programming Interface (DPI) is a very valuable addition. This second edition is a must-have book for every engineer involved in Verilog and SystemVerilog design and verification. The book serves well both as a general SystemVerilog reference and for learning object-oriented verification techniques. This book is such an invaluable reference, that my company includes a copy as part of the student training materials with every SystemVerilog verification course we teach!"

Stuart Sutherland, SystemVerilog Training Consultant, Sutherland HDL, Inc.

Chris Spear is a Verification Consultant for Synopsys, and has advised companies around the world on testbench methodology. He has trained hundreds of engineers on SystemVerilog's verification constructs.

Testbenches are growing more complex. You need this book to keep up.

Includes nearly 500 code samples and 70 figures.

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Produktdetails

• Verlag: Springer US
• Seitenzahl: 429
• Erscheinungstermin: 22. April 2008
• Englisch
• ISBN-13: 9780387765303
• Artikelnr.: 37286798

Autorenporträt

Chris Spear has been working in the ASIC design and verification field for 30 years. He started his career with Digital Equipment Corporation (DEC) as a / CAD Engineer on DECsim, connecting the first Zycad box ever sold, and then a hardware Verification engineer for the VAX 8600, and a hardware behavioral simulation accelerator. He then moved on to Cadence where he was an Application Engineer for Verilog-XL, followed by a stint at Viewlogic. Chris is currently employed at Synopsys Inc. as a Verification Consultant, a title he created a dozen years ago. He has authored the first and second editions of SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. Chris earned a BSEE from Cornell University in 1981. In his spare time, Chris enjoys road biking in the mountains and traveling with his wife. Greg Tumbush has been designing and verifying ASICs and FPGAs for 13 years. After working as a researcher in the Air Force Research Labs (AFRL) he moved to beautiful Colorado to work with Astek Corp as a Lead ASIC Design Engineer. He then began a 6 year career with Starkey Labs, AMI Semiconductor, and ON Semiconductor where he was an early adopter of SystemC and SystemVerilog. In 2008, Greg left ON Semiconductor to form Tumbush Enterprises, LLC where he has been consulting clients in the areas of design, verification, and backend to ensure first pass success. He is also a part time Instructor at the University of Colorado, Colorado Springs where he teaches senior and graduate level digital design and verification courses. He has numerous publications which can be viewed at www.tumbush.com. Greg earned a Ph.D. from the University of Cincinnati in 1998.

Inhaltsangabe

Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.