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Modern DSP circuits, such as FIR, DFT, DCT, Image Processing involve multiplications of data with several constants (MCM).Our focus is to reduce number of adders/ subtractors, delays and adder depth by searching common subexpression in coefficients of MIMO Multiplier less FIR System. Different Tie Breakers i.e.minimum adder depth (for reducing power consumption), minimum Delays (for reducing Area) and minimum shift were introduced which reduces the complexity of the system.Overlapping Digit Pattern was integrated in MCM. The algorithm is general and is capable to handle arbitrary number of inputs, constants and outputs and is based on iterative pairwise matching heuristics.