Andere Kunden interessierten sich auch für
![Power-Aware Testing and Test Strategies for Low Power Devices]( "Power-Aware Testing and Test Strategies for Low Power Devices")
Power-Aware Testing and Test Strategies for Low Power Devices81,99 €![Nanosystems Design and Technology]( "Nanosystems Design and Technology")
Nanosystems Design and Technology82,99 €![The Core Test Wrapper Handbook]( "The Core Test Wrapper Handbook")
The Core Test Wrapper Handbook81,99 €![Using WAVES and VHDL for Effective Design and Testing]( "Using WAVES and VHDL for Effective Design and Testing")
Using WAVES and VHDL for Effective Design and Testing110,99 €![On-Chip Instrumentation]( "On-Chip Instrumentation")
On-Chip Instrumentation74,99 €![Surviving the SOC Revolution]( "Surviving the SOC Revolution")
Surviving the SOC Revolution74,99 €![Programming Many-Core Chips]( "Programming Many-Core Chips")
Programming Many-Core Chips82,99 €
Modern electronics depend on nanoscaled technologies that present new challenges in terms of testing and diagnostics. Memories are particularly prone to defects since they exploit the technology limits to get the highest density. This book is an invaluable guide to the testing and diagnostics of the latest generation of SRAM, one of the most widely applied types of memory. Classical methods for testing memory are designed to handle the so-called "static faults," but these test solutions are not sufficient for faults that are emerging in the latest Very Deep Sub-Micron (VDSM) technologies. These new fault models, referred to as "dynamic faults", are not covered by classical test solutions and require the dedicated test sequences presented in this book.