Ghada Alsuhli, Vasilis Sakellariou, Hani Saleh

Number Systems for Deep Neural Network Architectures

• Broschiertes Buch

Produktbeschreibung

This book provides readers a comprehensive introduction to alternative number systems for more efficient representations of Deep Neural Network (DNN) data. Various number systems (conventional/unconventional) exploited for DNNs are discussed, including Floating Point (FP), Fixed Point (FXP), Logarithmic Number System (LNS), Residue Number System (RNS), Block Floating Point Number System (BFP), Dynamic Fixed-Point Number System (DFXP) and Posit Number System (PNS). The authors explore the impact of these number systems on the performance and hardware design of DNNs, highlighting the challenges associated with each number system and various solutions that are proposed for addressing them.

Produktdetails

• Synthesis Lectures on Engineering, Science, and Technology
• Verlag: Springer / Springer Nature Switzerland / Springer, Berlin
• Artikelnr. des Verlages: 978-3-031-38135-5
• 2024
• Seitenzahl: 108
• Erscheinungstermin: 19. September 2024
• Englisch
• Abmessung: 240mm x 168mm x 7mm
• Gewicht: 197g
• ISBN-13: 9783031381355
• ISBN-10: 3031381351
• Artikelnr.: 71759162

Autorenporträt

Ghada Alsuhli received her B.S. and M.S. degrees in electronics and communication engineering from Damascus University, Syria, in 2009 and 2015, respectively. She obtained her Ph.D. degree in electronics and communication engineering from Cairo University, Egypt, in 2019. Throughout her academic journey, she has been actively involved in research at esteemed institutions such as the National Research Center in Egypt, The American University in Cairo, Egypt, and the SOC Center at Khalifa University, UAE. Currently, Ghada holds the position of Post-Doctoral Researcher at Khalifa University, UAE, where she focuses on the design and implementation of Artificial Intelligence accelerators. Her research interests encompass a wide range of areas, including Artificial Intelligence applications in wireless communications, airborne and ground ad-hoc networks, and biomedical engineering. Vasilis Sakellariou received his Bachelor/Master Degree in Electrical Engineering and Computer Science in University of Patras, Greece, in 2015. He is currently pursuing his PhD title in Khalifa University in Abu Dhabi. During his master he specialized in the field of microelectronics, embedded systems, integrated circuits and VLSI design, while his thesis involved designing hardware accelerators for neuromorphic computing. His current research interests are focused on designing low-power accelerators for edge-AI devices by employing non-conventional arithmetic systems, with emphasis on the Residue Numbering System, as well as emerging in-memory computing paradigms. Hani Saleh is an associate professor of electronic engineering at Khalifa University since 2017, he joined Khalifa as assistant professor on 2012. He was a co-founder of the KSRC (Khalifa University Research Center 2012-2018) and a co-founder and a theme-lead in the System on Chip Research Center (SOCC 2019-present) where he led multiple IoT projects for the development of wearable blood glucose monitoring SOC, mobile surveillance SOC and AI Accelerators for edge devices. Hani has a total of 19 years of industrial experience in ASIC chip design, microprocessor design, DSP core design, graphics core design and embedded system design. Prior to joining Khalifa University he worked for many leading semiconductor design companies including a Senior Chip Designer (Technical Lead) at Apple incorporation, Intel (ATOM mobile microprocessor design), AMD (Bobcat mobile microprocessor design), Qualcomm (QDSP DSP core design for mobile SOC's), Synopsys (designed the I2C DW IP included in Synopys DesignWare library), Fujitsu (SPARC compatible high performance microprocessor design) and Motorola Australia. Hani received a Bachelor of Science degree in Electrical Engineering from the University of Jordan, a Master of Science degree in Electrical Engineering from the University of Texas at San Antonio, and a Ph.D. degree in Computer Engineering from the University of Texas at Austin. Mahmoud Al-Qutayri is Professor of Electrical and Computer Engineering and the Associate Provost for Academic Operations at Khalifa University (KU), UAE. He is also affiliated with KU System-on-Chip Center, which focuses on the design of high performance and energy efficient electronic devices and systems for a wide range of applications. Prior to joining Khalifa University, he worked at De Montfort University, UK, and the University of Bath, UK. He also worked at Philips Semiconductors, Southampton, UK. Dr. Al-Qutayri has authored or coauthored numerous technical papers in peer-reviewed journals and international conferences. He has also coauthored a book entitled Digital Phase Lock Loops: Architectures and Applications and has edited a book entitled Smart Home Systems. This is in addition to a number of book chapters and patents. His current research interests include embedded systems, in-memory computing and emerging memory technologies, energy efficient IoT systems, efficient edge computing and artificial intelligence hardware implementation, application of AI to wireless communication systems, wireless sensor networks, and cognitive wireless networks. He received a number of awards during his undergraduate and graduate education and professional career. His professional services include serving on the editorial board of some journals as well as membership of the steering, organizing, and technical program committees of many international conferences. > 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). He has over 16 years of industrial experience in microprocessor design, emphasizing memory, low power circuit, and physical design. Baker earned his Ph.D. from the University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and BS degree from the University of New Mexico, Albuquerque, all in ECE. Hi^3 books, >18 US patents, multiple invited seminars/panelists, and the presenter of >3 conference tutorials, including one tutorial on Energy harvesting and Power management for WSN at the 2015 (ISCAS). Baker is an associate editor for IEEE Access, IEEE Transaction on VLSI (TVLSI), and Scientific Reports journals. Dr Mohammad participates in many technical committees at IEEE conferences and reviews for TVLSI,IEEE Circuits and Systems journals. He has received several awards, including the KUSTAR staff excellence award in intellectual property creation, IEEE TVLSI best paper award, 2016 IEEE MWSCAS Myrill B. Reed best paper award, Qualcomm Qstar award for excellence on performance and leadership. SRC Techon best session papers for 2016 and 2017. 2009 Best paper award for Qualcomm Qtech conference and Intel Involve in the community award for volunteer and impact on the community. Thanos Stouraitis is an IEEE Life Fellow for his "contributions in digital signal processing architectures and computer arithmetic," is Professor of the Department of Electrical Engineering and Computer Science of Khalifa University, UAE. He is also Professor Emeritus of the University Patras, and has served on the faculties of Ohio State University, University of Florida, New York University, and University of British Columbia. He served on the National Scientific Board for Mathematics and Informatics of Greece and was a founding Council member of the University of Central Greece. He holds a Ph.D. from the University of Florida.  His current research interests include AI hardware systems, signal and image processing systems, computer arithmetic, and design and architecture of optimal digital systems with emphasis on cryptographic systems. He has authored about 200 technical papers, several book chapters, and holds several patents on DSP processor design. He has authored the Univ. of Patras Press book "Digital Signal Processing," and co-authored the Marcel Dekker Inc. book "Digital Filter Design Software for the IBM PC," and the 2017 Wiley-IEEE Press book "Arithmetic Circuits for DSP Applications". He has led several processor design projects funded by European Union and American organizations. He has served as Editor or Guest Editor for numerous technical journals, including IEEE Trans. on Computers, Trans. on Circuits and Systems, Trans. on VLSI, etc. He served as General Chair and/or Technical Program Committee Chair for many international conferences, like IEEE ISCAS, AICAS, SiPS, ICECS, GlobeCom, etc. He received the IEEE Circuits and Systems Society Guillemin-Cauer Award. He has served IEEE in many ways, including as President, during 2012-13, of IEEE Circuits and Systems Society.

Inhaltsangabe

Introduction.- Conventional number systems.- DNN architectures based on Logarithmic Number System (LNS).- DNN architectures based on Residue Number System (RNS).- DNN architectures based on Block Floating Point (BFP) number system.- DNN architectures based on Dynamic Fixed Point (DFXP) number system.- DNN architectures based on Posit number system.